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  • An Improved Wireless Communication Fabric for Performance Aware Network-on-Chip Architectures 
    Agyeman,Michael Opoku; Tong,Kenneth; Mak,Terrence (2016)
    Existing wireless communication interface has free space signal radiation which drastically reduces the received signal strength and hence reduces the throughput efficiency of Hybrid Wired-Wireless Network-on-Chip (WiNoC). ...
  • Embedded Systems Design Using Event-B Theories 
    HARICHE,Abdelhamid; BELARBI,Mostefa; CHOUARFIA,Abdallah (2016)
    FPGA-Based Embedded systems have a strong impact in everyday life, these systems must be reliable, and their specifications and design should be clear, understandable and must follow specific rules. Therefore, because of ...
  • The Performance of NoCs for Very Large Manycore Systems under Locality-based Traffic 
    Al Khanjari,Sharifa; Vanderbauwhede, Wim (2016)
    The scaling of semiconductor technologies is leading to processors with increasing numbers of cores. A key enabler in manycore systems is the use of Networks-on-Chip (NoC) as a global communication mechanism. The adoption ...
  • NoC Dimensioning from Mathematical Models 
    Fresse,Virginie; Combes, Catherine; Payet,Matthieu; Rousseau, Frederic (2016)
    NoCs (Network-on-Chip) have emerged as efficient scalable and low power communication structures for SoC (System-On-Chip). Two main challenges are pointed out when prototyping a SoC on a reconfigurable chip such as FPGA ...
  • Group based Shortest Path Routing Algorithm for Hierarchical Cross Connected Recursive Networks (HCCR) 
    Inam,Omair; Al Khanjari,Sharifa; Vanderbauwhede,Wim (2016)
    Interconnection networks play a significant role in efficient on-chip communication for multicore systems. This paper introduces a new interconnection topology called the Hierarchical Cross Connected Recursive network ...
  • Performance Evaluation of Modern Network-on-Chip Router Architectures 
    Latif,Jawwad; Azam,Sadia; Chaudhry,Hassan Nazeer; Muhammad, Tahir (2016)
    On chip interconnection networks simplify the challenges of integrating large number of processing elements. Routers are backbone of networks. Buffers and crossbar in router consumes significant area and power of network. ...
  • Introduction to Special Issue: Design and Performance of Networks on Chip 
    Abdallah,Abderazek Ben; Vaidyanathan,Ramachandran; Ariwa,Ezendu; El-Medany,Wael (2016)
    This special issue of International Journal of Computing and Digital Systems (IJCDS) focuses on Design and Performance of Networks on Chip, and publishes selected papers from the 2nd International Workshop on Design and ...

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