dc.contributor.author | Kalyan, Birinderjit Singh | |
dc.contributor.author | Singh, Balwinder | |
dc.date.accessioned | 2020-04-30T10:36:16Z | |
dc.date.available | 2020-04-30T10:36:16Z | |
dc.date.issued | 2020-05-01 | |
dc.identifier.issn | 2210-142X | |
dc.identifier.uri | https://journal.uob.edu.bh:443/handle/123456789/3834 | |
dc.description.abstract | The latest trends in the digital design circuits are based on Quantum Dot based structures. The Quantum-dot Cellular automata is paradigm in the area of Nano chip design in terms of their size and low power, which plays a significant role in the Nano electronic industry. This paper presents a novel robust design of LFSR which consumes lesser power than conventional design which is restructured using QCA based XOR gate and D Flip Flop. The simulation of the proposed design were done using coherence engine vector of QCA designer tool. The D flip flop show 41% lesser complexity and power with the single latency. The XOR Gate is designed with 22 QCA Cells and complexity of 0.02 µm2 and latency of 0.75 cycles as compare to previous design which was having 28 cells. The proposed 4 Bit LFSR is designed using four D flip flops and one XOR gate, further average power dissipation is calculated. | en_US |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Quantum Cellular Automata (QCA) | en_US |
dc.subject | Majority Logic | en_US |
dc.subject | Linear Feedback Shift Register (LFSR) | en_US |
dc.subject | Combinational Logic | en_US |
dc.subject | QCA Designer | en_US |
dc.subject | Flip Flop (FF) | en_US |
dc.subject | Clock (Clk) | en_US |
dc.title | Performance Analysis of Quantum Dot Cellular Automata (QCA) based Linear Feedback Shift Register (LFSR) | en_US |
dc.identifier.doi | http://dx.doi.org/10.12785/ijcds/090318 | |
dc.volume | Volume 09 | en_US |
dc.issue | Issue 03 | en_US |
dc.contributor.authorcountry | India | en_US |
dc.contributor.authorcountry | India | en_US |
dc.contributor.authoraffiliation | I K Gujral Punjab Technical University, Jalandhar, India | en_US |
dc.contributor.authoraffiliation | ACS Division, Centre for Development of Advanced Computing (C-DAC), Mohali, India (Ministry of Electronics and Information Technology, Govt of India) | en_US |
dc.source.title | International Journal of Computing and Digital Systems | en_US |
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