Abstract:
Nowadays, as the number of smart devices is increasing, technologies like Radio Frequency Identification (RFID) and the Internet of Things (IoT) are playing a vital role in communicating among various smart devices which require high security for the data transmission using fewer resources effectively. To implement security with fewer resources available, one of the methods is to use lightweight cryptographic algorithms. Cipher is one of the cryptographic algorithms, which uses the key for encryption and decryption. This paper describes three lightweight symmetric stream ciphers, Grain v1, Lizard, and Plantlet, and their different versions. These versions are implemented on various Field Programmable Gate Array (FPGA) boards such as Kintex7, Virtex7, and Zynq, and their simulations, synthesis, and implementations are performed with the help of Xilinx ISE using Verilog Hardware Description Language (HDL). The area, frequency, throughput, and throughput per area are compared among the different versions of the same cipher and also with existing literature. To generate keystream bits, Grain v1 uses 161 clocks in the basic version, 320 clocks in the serial version, and 11 clocks in the parallel version, Lizard uses 258 clocks in the basic version, 499 clocks in the serial version and 46 clocks in parallel version and Plantlet uses 321 clocks in the basic version and 491 clocks in serial version. The parallel version provides high throughput than the basic and serial versions as the keystream bits generated in each clock cycle are more. Among these versions, the parallel version of Grain v1 and Lizard gave the highest throughput of 9147 and 2412 Mbps along with throughput per area of 50.81 and 9.28 respectively. The parallelism helps in achieving faster data transfer and high operating frequency ranges which is more suitable for the present emerging technologies IOT, blockchains, and Ultra High Frequency Radio Frequency Identification (UHF-RFID).
