University of Bahrain
Scientific Journals

RSA Power Analysis Obfuscation: A Dynamic Algorithmic Hardware Countermeasure

Show simple item record Andel, Todd R. Barron, John W. McDonald, J. Todd Humphries, Jeffrey W. 2018-07-08T07:27:16Z 2018-07-08T07:27:16Z 2014
dc.identifier.issn 2210-142X
dc.description.abstract The modular exponentiation operation used in popular public key encryption schemes, such as RSA, has been the focus of many side channel analysis (SCA) attacks in recent years. Current SCA attack countermeasures are static, referring to the algorithmic elements as implemented in hardware. Given sufficient signal-to-noise ratio and a number of power traces, static countermeasures can be defeated, as they merely attempt to hide the power consumption of the system under attack. This paper develops a dynamic countermeasure which constantly varies the timing and power consumption of each operation, making correlation between traces more difficult. By randomizing the radix of encoding for Booth multiplication and randomizing the window size for exponentiation, we demonstrate a SCA countermeasure can be constructed which increases RSA SCA attack protection up to at least 100,000 encryption cycles, as well as a reduced execution time due to a reduction in required operations. en_US
dc.language.iso en_US en_US
dc.publisher University of Bahrain en_US
dc.rights Attribution-NonCommercial-ShareAlike 4.0 International *
dc.rights.uri *
dc.subject Countermeasure en_US
dc.subject Side-Channels en_US
dc.subject FPGA en_US
dc.subject DPA en_US
dc.subject RSA en_US
dc.title RSA Power Analysis Obfuscation: A Dynamic Algorithmic Hardware Countermeasure en_US
dc.type Article en_US
dc.volume 03
dc.issue 02
dc.source.title International Journal of Computing and Digital Systems
dc.abbreviatedsourcetitle IJCDS

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