University of Bahrain
Scientific Journals

Neuromorphic Processor Design and FPGA Implementation for Handwritten Digits employing Spiking Neural Network

Show simple item record

dc.contributor.author Sowmya, Nagavarapu
dc.contributor.author Kumar, Jitendra
dc.contributor.author Biswal, Pradyut K.
dc.contributor.author Roy, Shirshendu
dc.contributor.author Pradhan, Subhrajit
dc.date.accessioned 2023-05-06T09:35:24Z
dc.date.available 2023-05-06T09:35:24Z
dc.date.issued 2023-09-01
dc.identifier.issn 2210-142X
dc.identifier.uri https://journal.uob.edu.bh:443/handle/123456789/4917
dc.description.abstract Spiking Neural Network (SNN) is very popular and effective in modelling the physical neurons compared to other models of the neural network. Besides the software implementation of the neuromorphic processors, hardware implementation of the neuromorphic processors is also very important in order to apply it in real-time domain. In this work, a hardware efficient architecture of the neuromorphic processor is proposed. The proposed architecture is efficient in terms of low usage of memory elements and other hardware resources. Virtex-6 field programmable gate array (FPGA) development board is used to validate the proposed design. Fixed data format of width 18 is used in this work and 10-bit is reserved for the fractional part. The proposed architecture is applied to detect the handwritten digits. In this work, MNIST database is used to train and validate the SNN. The proposed architecture achieves 90% accuracy when used to recognize the handwritten digit data. en_US
dc.language.iso en en_US
dc.publisher University of Bahrain en_US
dc.subject Spiking Neural Network (SNN); Spike Timing Dependent Plasticity (STDP); Leaky Integrate and Fire (LIF); FPGA; Hand written digit recognition en_US
dc.title Neuromorphic Processor Design and FPGA Implementation for Handwritten Digits employing Spiking Neural Network en_US
dc.identifier.doi http://dx.doi.org/10.12785/ijcds/140152
dc.volume 14 en_US
dc.issue 1 en_US
dc.pagestart 1 en_US
dc.pageend 1 en_US
dc.contributor.authorcountry India en_US
dc.contributor.authoraffiliation GIETU, Gunupur en_US
dc.contributor.authoraffiliation IIIT Bhubaneswar en_US
dc.contributor.authoraffiliation Dayanand Sagar University en_US
dc.contributor.authoraffiliation GIFT, Bhubaneswar en_US
dc.source.title International Journal of Computing and Digital Systems en_US
dc.abbreviatedsourcetitle IJCDS en_US


Files in this item

This item appears in the following Issue(s)

Show simple item record

All Journals


Advanced Search

Browse

Administrator Account